Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department.
He has published more than 280 journal and conference papers, and book or book chapters in the areas of hybrid cloud systems, machine learning and AI, security and confidential computing, reconfigurable and heterogeneous computing, and system-level design methodologies. He has served as PI/Co-PI on more than 40 research grants administered by US Federal agencies as well as the industry. In addition, he has been a seconded faculty member for the Illinois ARCS (formerly ADSC) center in Singapore since March 2010. He has received ten Best Paper Awards, an ACM/SIGDA TCFPGA Hall-of-Fame Paper Award, and numerous other research, design competition, and service related awards.
He had led the successful FCUDA open-source project during 2008-2016 that used CUDA language to program FPGAs, offering opportunity to map existing CUDA kernels to FPGAs for low-energy and high-performance computing. The vision and development of such a true parallel-language to FPGA compilation flow was 5-6 years earlier than similar commercial tool flows, such as the OpenCL-to-FPGA flows offered from Intel and AMD-Xilinx. The most recent representative open-source packages from his lab include: RIP, which consists of fast software modeling (320x faster than Gem5), fast hardware modeling (2000x faster than baseline), and near-optimal automated hardware/software partitioning for complex SoC designs; Cloud-DNN, which is an open-source framework that maps DNN (deep neural network) models to FPGAs in the cloud for inference acceleration; DNNBuilder, which represents the best FPGA implementation of DNNs for both edge and cloud computing use cases; SkyNet, which is a novel DNN model that won double championships in 2019's DAC System Design Contest for challenging image-based object-detection tasks developed through a new DNN/Accelerator co-design/co-search/co-generation method; and ScaleHLS + HIDA, which are next-generation new HLS flows that directly compile PyTorch models to customized AI accelerators (so far, ScaleHLS & HIDA have been viewed for >60k times and downloaded for ~3500 times). Several such open-source solutions have been adopted by the industry.
Another exemplar project is Medusa, which has been incorporated into several commercial flows, including Nvidia's TensorRT-LLM for parallel token generation to improve the speed of LLM (large language model) execution by 1.9-3.6x. Nvidia engineerers wrote a blog: Medusa improves Llama 3.1 Performance by 1.9x on Nvidia HGX H200 with NVLink Switch.
Dr. Chen was involved in several startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera and distributed to many customers of Altera worldwide. He is one of the inventors of the xPilot High-level Synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc. Aplus was acquired by Magma in 2003, and AutoESL was acquired by Xilinx in 2011. Currently, he is the Chairman of the Board for a new startup Inspirit IoT, Inc., headquartered in the Research Park at Champaign, IL.
Dr. Chen is an IEEE Fellow and the Editor-in-Chief of ACM Transactions on Reconfigurable Technology and Systems (TRETS). Under his leadership, the impact factor of ACM TRETS has jumped by 3.8x. He is also the Director of AMD-Xilinx Center of Excellence at UIUC and the Co-lead for the Hybrid Cloud & AI thrust in the IBM-Illinois Discovery Accelerator Institute (IIDAI).